Jain, Cheena and Gill, Sandeep Singh (2014) Carbon Nanotube Field Effect Transistor Based 4-Bit Full Adder Cell. British Journal of Applied Science & Technology, 4 (25). pp. 3678-3686. ISSN 22310843
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Abstract
Addition is considered as the basic operation for every digital circuit or system, digital signal processing and control system. The fast and accurate operation of any digital system is mainly influenced by the performance of its resident adders. In this paper a 4-bit full adder is proposed using carbon nanotube field effect transistor which is energy efficient, operates at high speed and low voltage and consumes ultra low power. The full adder cell is designed using 48 transistors. The proposed technique has been examined at voltage 0.8V. The simulation results taken on HSPICE show that this module has given more than 42% in power savings over conventional Complementary Metal Oxide Semiconductor (CMOS) adder and 56% is faster.
Item Type: | Article |
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Subjects: | Archive Paper Guardians > Multidisciplinary |
Depositing User: | Unnamed user with email support@archive.paperguardians.com |
Date Deposited: | 20 Jan 2024 10:40 |
Last Modified: | 20 Jan 2024 10:40 |
URI: | http://archives.articleproms.com/id/eprint/1287 |